7.1.1 Device is Asleep
When the device is asleep, it ignores all but the Wake condition.
- Wake – Upon the rising edge of SDA, after SDA is held low for a period ≥ tWLO, the device exits the Low-Power mode. After a delay of tWHI, it will be ready to receive I2C commands.
- The device ignores any levels or transitions on the SCL pin when the device is idle or asleep and during tWLO. At some point during tWHI, the SCL pin is enabled and the conditions listed in 7.1.2 Device is Awake are honored.
The Wake condition requires that either the system processor manually drive the SDA pin low for tWLO, or a data byte of 0x00 be transmitted at a clock rate sufficiently slow so that SDA is low for a minimum period of tWLO. When the device is awake, the normal processor I2C hardware and/or software can be used for device communications. This includes the I/O sequences required to put the device back into Low-Power (i.e., Sleep) mode.
In the I2C mode, the device will ignore a wake sequence that is sent when the device is already awake.
Multiple Devices on the Bus
When there are multiple devices on the bus and the I2C interface is run at speeds of less than ~300 kHz1, the transmission of certain data patterns will cause the ATECC608B-TNGTLS devices on the bus to wake up. The lower the frequency, the higher the probability that the device wakes up. Because subsequent device addresses transmitted along the bus only match the desired devices, the ATECC608B-TNGTLS will not respond but will be awake. It is recommended that after communicating with another device at slow frequencies, a sleep or idle sequence be issued to place the ATECC608B-TNGTLS back into a known state.