2.7.1 TWI, SDAHOLD Configuration in the TWI CTRL Register is one bit

The SDAHOLD configuration in the TWI Control (CTRL) register is one bit. Due to this, the SDA hold time can be configured for a maximum of ~50 ns when enabled. Configuring for a longer hold time will have no effect.

Work Around

It must be handled in software if a longer SDA hold time than 50 ns is required.

Affected Silicon Revisions