| Device | Register ANAINIT in MCUR Will Always Read as
Zero | X |
| Internal 1V Reference has Noise at Low
Temperature | X |
| System Clock | Enabling DFLL With Illegal Reference
Oscillator Will Lock the Clock System | X |
| XOSCPWR Configuration is
Non-Functional | X |
| AWeX | AWeX PWM Output After Fault Restarted With
Wrong Values | X |
| Configuration of PGM and CWCM is not as
Described in XMEGA AU Manual | X |
| RTC | RTC Counter Value not Correctly Read After
Sleep | X |
| RTC Clock Output Option is
Non-Functional | X |
| USB | USB, When Receiving 1023 Byte Length
Isochronous Frame, it Will Corrupt the 1024th SRAM
Location | X |
| USB Endpoint Table is 16-byte
Alignment | X |
| USB Auto ZLP Feature is Non-Functional | X |
| TWI | TWI, SDAHOLD Configuration in the TWI CTRL
Register is one bit | X |
| USART | Disabling the USART Transmitter Does not
Automatically set the TxD Pin Direction to Input | X |
| ADC | ADC has Increased INL Error in When Used in SE
Unsigned Mode at Low Temperatures | X |
| ADC is Non-Functional in SE Unsigned Mode With
VREF Below 1.8V | X |
| ADC has Increased Linearity Error When Using
the Gain Stage Above 500 ksps | X |
| DAC | DAC Offset Calibration Range too Small When
Using AVCC as Reference | X |
| DAC Clock Noise | X |
