25.2.1 I²C Mode Registers

The MSSP module has eight registers for I²C operation.

These are:

• MSSP Status register (SSPxSTAT)
• MSSP Control register 1 (SSPxCON1)
• MSSP Control register 2 (SSPxCON2)
• MSSP Control register 3 (SSPxCON3)
• Serial Receive/Transmit Buffer register (SSPxBUF)
• MSSP Address register (SSPxADD)
• I²C Slave Address Mask register (SSPxMSK)
• MSSP Shift register (SSPSR) – not directly accessible

SSPxCON1, SSPxCON2, SSPxCON3 and SSPxSTAT are the Control and Status registers in I²C mode operation. The SSPxCON1, SSPxCON2, and SSPxCON3 registers are readable and writable. The lower six bits of the SSPxSTAT are read-only. The upper two bits of the SSPxSTAT are read/write. SSPxMSK holds the slave address mask value used in address comparison. SSPxADD contains the slave device address when the MSSP is configured in I²C Slave mode. When the MSSP is configured in Master mode, SSPxADD acts as the Baud Rate Generator reload value.

SSPSR is the Shift register used for shifting data in or out. SSPxBUF is the Buffer register to which data bytes are written to or read from. In receive operations, SSPSR and SSPxBUF together, create a double-buffered receiver. When SSPSR receives a complete byte, it is transferred to SSPxBUF and the SSPxIF interrupt is set. During transmission, the SSPxBUF is not double-buffered. A write to SSPxBUF will write to both SSPxBUF and SSPSR.