27.2.9 SMTxCPW

SMT Captured Pulse-Width Register

Note: The individual bytes in this multibyte register can be accessed with the following register names:

SMTxCPWU: Accesses the upper byte CPW[23:16]
SMTxCPWH: Accesses the high byte CPW[15:8]
SMTxCPWL: Accesses the low byte CPW[7:0]

Name:	SMTxCPW
Offset:	0x0306


Bit	23	22	21	20	19	18	17	16
	CPW[23:16]
Access	R	R	R	R	R	R	R	R
Reset	x	x	x	x	x	x	x	x


Bit	15	14	13	12	11	10	9	8
	CPW[15:8]
Access	R	R	R	R	R	R	R	R
Reset	x	x	x	x	x	x	x	x


Bit	7	6	5	4	3	2	1	0
	CPW[7:0]
Access	R	R	R	R	R	R	R	R
Reset	x	x	x	x	x	x	x	x

Bits 23:0 – CPW[23:0] SMTxTMR Value at Time of Capture Event

Reset States:

POR/BOR = xxxxxxxxxxxxxxxxxxxxxxxx

All Other Resets = uuuuuuuuuuuuuuuuuuuuuuuu

The individual bytes in this multibyte register can be accessed with the following register names: SMTxCPWU: Accesses the upper byte CPW[23:16] SMTxCPWH: Accesses the high byte CPW[15:8] SMTxCPWL: Accesses the low byte CPW[7:0]