27.2.6 SMTxSIG

SMT Signal Selection Register

Name:	SMTxSIG
Offset:	0x0310


Bit	7	6	5	4	3	2	1	0
			SSEL[5:0]
Access			R/W	R/W	R/W	R/W	R/W	R/W
Reset			0	0	0	0	0	0

Bits 5:0 – SSEL[5:0] SMT Signal Selection


SSEL Value	Source
`111111-100110`	Reserved
`100101`	CLC8_OUT
`100100`	CLC7_OUT
`100011`	CLC6_OUT
`100010`	CLC5_OUT
`100001`	CLC4_OUT
`100000`	CLC3_OUT
`011111`	CLC2_OUT
`011110`	CLC1_OUT
`011101`	ZCD_OUT
`011100`	CMP2_OUT
`011011`	CMP1_OUT
`011010`	NCO3_OUT
`011001`	NCO2_OUT
`011000`	NCO1_OUT
`010111`	PWM4S1P2_OUT
`010110`	PWM4S1P1_OUT
`010101`	PWM3S1P2_OUT
`010100`	PWM3S1P1_OUT
`010011`	PWM2S1P2_OUT
`010010`	PWM2S1P1_OUT
`010001`	PWM1S1P2_OUT
`010000`	PWM1S1P1_OUT
`001111`	CCP3_OUT
`001110`	CCP2_OUT
`001101`	CCP1_OUT
`001100-001010`	Reserved
`001001`	TU16B_OUT
`001000`	TU16A_OUT
`000111`	TMR6_Postscaler_OUT
`000110`	TMR5_OUT
`000101`	TMR4_Postscaler_OUT
`000100`	TMR3_OUT
`000011`	TMR2_Postscaler_OUT
`000010`	TMR1_OUT
`000001`	TMR0_OUT
`000000`	SMT1SIGPPS

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