26.10.1 TxTMR
| Name: | TxTMR |
| Offset: | 0x322,0x32E,0x33A |
Timer Counter Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TxTMR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Name: | TxTMR |
| Offset: | 0x322,0x32E,0x33A |
Timer Counter Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TxTMR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.