26.10.6 TxRST
Name: | TxRST |
Offset: | 0x327,0x333,0x33F |
Timer External Reset Signal Selection Register
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
RSEL[5:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 5:0 – RSEL[5:0] External Reset Source Selection
RSEL | Reset Source | ||
---|---|---|---|
TMR2 | TMR4 | TMR6 | |
111111-100100 |
Reserved | ||
100011 |
U5TX_Edge (Positive/Negative) | ||
100010 |
U5RX_Edge (Positive/Negative) | ||
100001 |
U4TX_Edge (Positive/Negative) | ||
100000 |
U4RX_Edge (Positive/Negative) | ||
011111 |
U3TX_Edge (Positive/Negative) | ||
011110 |
U3RX_Edge (Positive/Negative) | ||
011101 |
U2TX_Edge (Positive/Negative) | ||
011100 |
U2RX_Edge (Positive/Negative) | ||
011011 |
U1TX_Edge (Positive/Negative) | ||
011010 |
U1RX_Edge (Positive/Negative) | ||
011001 |
CLC8_OUT | ||
011000 |
CLC7_OUT | ||
010111 |
CLC6_OUT | ||
010110 |
CLC5_OUT | ||
010101 |
CLC4_OUT | ||
010100 |
CLC3_OUT | ||
010011 |
CLC2_OUT | ||
010010 |
CLC1_OUT | ||
010001 |
ZCD_OUT | ||
010000 |
CMP2_OUT | ||
001111 |
CMP1_OUT | ||
001110 |
PWM4S1P2_OUT | ||
001101 |
PWM4S1P1_OUT | ||
001100 |
PWM3S1P2_OUT | ||
001011 |
PWM3S1P1_OUT | ||
001010 |
PWM2S1P2_OUT | ||
001001 |
PWM2S1P1_OUT | ||
001000 |
PWM1S1P2_OUT | ||
000111 |
PWM1S1P1_OUT | ||
000110 |
CCP3_OUT | ||
000101 |
CCP2_OUT | ||
000100 |
CCP1_OUT | ||
000011 |
TMR6_Postscaler_OUT | TMR6_Postscaler_OUT | Reserved |
000010 |
TMR4_Postscaler_OUT | Reserved | TMR4_Postscaler_OUT |
000001 |
Reserved | TMR2_Postscaler_OUT | TMR2_Postscaler_OUT |
000000 |
Pin selected by T2INPPS | Pin selected by T4INPPS | Pin selected by T6INPPS |