37.5.8 I2CxERR

I2C Error Register

Note:

Enabled error interrupt flags are OR’ed to produce the PIRx[I2CxEIF] bit.
User software must select the bus time-out source in the I2CxBTOC register.
NACKIF is also set when any of the TXWE, RXRE, TXU, or RXO bits are set.
NACKIF is not set for the NACK response to a nonmatching client address.

Name:	I2CxERR
Offset:	0x0297


Bit	7	6	5	4	3	2	1	0
		BTOIF	BCLIF	NACKIF		BTOIE	BLCIE	NACKIE
Access		R/W/HS	R/W/HS	R/W/HS		R/W	R/W	R/W
Reset		0	0	0		0	0	0

Bit 6 – BTOIF Bus Time-Out Interrupt Flag^(1,2)

Value	Description
`1`	Bus time-out event occurred
`0`	No bus time-out event occurred

Bit 5 – BCLIF Bus Collision Detect Interrupt Flag⁽¹⁾

Value	Description
`1`	Bus collision detected
`0`	No bus collision occurred

Bit 4 – NACKIF NACK Detect Interrupt Flag^(1,3,4)

Value	Description
`1`	NACK detected on the bus (when SMA = `1` or MMA = `1`)
`0`	No NACK detected on the bus

Bit 2 – BTOIE Bus Time-Out Interrupt Enable

Value	Description
`1`	Enable bus time-out interrupts
`0`	Disable bus time-out interrupts

Bit 1 – BLCIE Bus Collision Detect Interrupt Enable

Value	Description
`1`	Enable Bus Collision interrupts
`0`	Disable Bus Collision interrupts

Bit 0 – NACKIE NACK Detect Interrupt Enable

Value	Description
`1`	Enable NACK detect interrupts
`0`	Disable NACK detect interrupts

Enabled error interrupt flags are OR’ed to produce the PIRx[I2CxEIF] bit. User software must select the bus time-out source in the I2CxBTOCI2CxBTOC register. NACKIF is also set when any of the TXWE Transmit Write Error Status(1) , RXRE Receive Read Error Status(1) , TXU Transmit Underflow Status (used only when MODE I2C Mode Select = 0xx or MODE I2C Mode Select = 11x)(3) , or RXO Receive Overflow Status (used only when MODE I2C Mode Select = 0xx or MODE = 11x)(3) bits are set. NACKIF is not set for the NACK response to a nonmatching client address.