3 Document Revision History

The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication.

RevisionDateSectionDescription
C09/2025OverviewAdded device names PIC32CX5109BZ36048 and PIC32CX5109BZ36032
Silicon Errata SummaryUpdated table
Analog-to-Digital Converter (ADC)Added Improper Comparison Operation in Stand by Sleep Mode
Removed “Scan”
Configurable Custom Logic (CCL)Added Output Logic is Stuck when Enabling a LUT with Sequential Logic after the CCL is Enabled
Added PAC Error when Writing CCL.CTRL.SWRST Bit Description
Direct Memory Access Controller (DMAC)Removed “Linked Descriptors”
Added Fetch Error can Appear when Enable One Channel and Link Request on Another
GPIOAdded GPIO Port Value unstable in Debug and Freeze Mode
External Interrupt Controller (EIC)Removed “Edge detection”
Removed “Asynchronous Edge detection”
Event System (EVSYS)Removed “RESYNC Mode, Spurious Event Detections”
RAM Error Correction Code (RAMECC)Added 6 Bytes Not Retained at Address 0x20000006 Offset
Real-Time Clock Calender (RTCC)Added Tamper Input Filter
Updated the description and work around Tamper Detection
Removed “ RTC SYNCBUSY Register Bits Not Cleared”
Removed “Tamper Detection”
Updated the description and work around TIMESTAMP Lock by INFLAG.TAMPER
Serial Communication Interface (SERCOM)Added SERCOM-SPI: 32-Bit Extension Mode Additional Bytes
Added SERCOM-I2C Client: I2C DRDY Raised when no Data is to be Fed
Removed “SERCOM-USART: Over-consumption in Stand-by Mode when Using ISO7816 Mode”
Removed “SERCOM-I2C: STATUS.CLKHOLD Bit in the Host and Client Modes “
Removed “SERCOM-I2C: 10-Bit Addressing Mode”
Removed “SERCOM-I2C: Repeated Start”
Added SERCOM-LIN: Two Stop Bits Mode is Not Supported in SERCOM USART LIN Host Mode
Timer/Counter for Control Applications (TCC)Added LUPD in Descendent Mode
Updated the title Corrupted Re-trigger Event Waveform Output
Added TCC Capture Mode with Synchronous Event
Updated the title TCC in Dithering Mode with External Re-trigger Events
Removed “Re-trigger in RAMP2 Operations”
Removed “TCC with EVSYS in SYNC/RESYNC Mode”
Removed “LUPD Feature in Down-Counting Mode”
Removed “ALOCK Feature”
Removed “MCx Interrupt Status Flag is Not Cleared Automatically”
Timer/Counter (TC)Removed “PER Register Reference”
Removed “MCx Interrupt Status Flag is Not Cleared Automatically”
B06/2025Silicon Errata SummaryUpdated table
Supply Voltage and Power ModeAdded GPIO Change Notification Interrupt Not Firing After Sleep
Added Power Management Support
Direct Memory Access Controller (DMAC)Added DMA Writeback Descriptor Corruption Issue
Event System (EVSYS)Added “RESYNC Mode, Spurious Event Detections”
Flash Controller ModuleAdded Risk of NMI False/Deep Power Down (DPD)
Serial Communication Interface (SERCOM)Deleted SERCOM-USART: TXINV and RXINV Bits and SERCOM-USART: 32-Bit Extension Mode errata issue.
Added SERCOM-I2C: SCL/SDA Transition Time, SERCOM-USART: Over-consumption in Stand-by Mode when Using ISO7816 Mode
Data Sheet ClarificationsAdded section
A03/2024DocumentInitial revision