1.4.1.3 LVDS 1.8V GPIO Standard (LVDS18G)
Libero SoC v2021.2 introduces a distinct I/O standard called LVDS18G to support LVDS I/Os on GPIO banks with VDDI set to 1.8V.
For more details, see the following documents:
Libero SoC v2021.2 introduces a distinct I/O standard called LVDS18G to support LVDS I/Os on GPIO banks with VDDI set to 1.8V.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.