4.3 Communication Protocol Handling

Serial Communication Interface (SERCOM) address matching wakes the CPU on I²C address detection
Universal Asynchronous Receiver/Transmitter (UART) start-of-frame detection enables autonomous message reception
Direct Memory Access (DMA) controller buffers complete packets before CPU intervention

DS90003388A

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.