50.3.2 Supply Current (I_DD)⁽¹⁾

Table 50-2.
Standard Operating Conditions (unless otherwise stated)
Param. No.	Sym.	Device Characteristics	Min.	Typ.†	Max.	Units	Conditions
Param. No.	Sym.	Device Characteristics	Min.	Typ.†	Max.	Units	V_DD	Note
D100	I_{DD_XT4}	XT = 4 MHz	—	750	870	μA	3.0V
D100A	I_{DD_XT4}	XT = 4 MHz	—	570	700	μA	3.0V	All PMD bits are ‘1'
D101	I_{DD_HFO16}	HFINTOSC = 16 MHz	—	2.3	2.9	mA	3.0V
D101A	I_{DD_HFO16}	HFINTOSC = 16 MHz	—	1.6	2.1	mA	3.0V	All PMD bits are ‘1'
D102	I_{DD_HFOPLL}	HFINTOSC = 64 MHz	—	7.7	9	mA	3.0V
D102A	I_{DD_HFOPLL}	HFINTOSC = 64 MHz	—	4.9	6	mA	3.0V	All PMD bits are ‘1'
D103	I_{DD_HSPLL64}	HS+PLL = 64 MHz	—	7.5	13.8	mA	3.0V
D103A	I_{DD_HSPLL64}	HS+PLL = 64 MHz	—	4.7	11.5	mA	3.0V	All PMD bits are ‘1'
D104	I_{DD_IDLE}	Idle mode, HFINTOSC = 16 MHz	—	1.6	2.5	mA	3.0V
D105	I_{DD_DOZE}⁽³⁾	Doze mode, HFINTOSC = 16 MHz, Doze Ratio = 16	—	1.7	2.6	mA	3.0V
† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: The test conditions for all I_DD measurements in Active Operation mode are: OSC1 = external square wave, from rail-to-rail; all I/O pins are outputs driven low; MCLR = V_DD; WDT disabled. The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. I_{DD_DOZE} = [I_{DD_IDLE}(N-1)/N] + I_{DD_HFO}16/N where N = Doze Ratio (see the CPUDOZE* register). PMD bits are all in the Default state, no modules are disabled.

50.3.2 Supply Current (IDD)(1)

50.3.2 Supply Current (I_DD)⁽¹⁾