36.5.9 I2CxCLK

I2C Clock Selection Register

Name:	I2CxCLK
Address:	0x029E


Bit	7	6	5	4	3	2	1	0
					CLK[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bits 3:0 – CLK[3:0] I2C Clock Selection

Table 36-4.
CLK	Selection
`1111 - 1110`	Reserved
`1101`	CLC4_OUT
`1100`	CLC3_OUT
`1011`	CLC2_OUT
`1010`	CLC1_OUT
`1001`	SMT1_OUT
`1000`	TMR4_Postscaler_OUT
`0111`	TMR2_Postscaler_OUT
`0110`	TMR0_OUT
`0101`	EXTOSC
`0100`	Clock Reference Output
`0011`	MFINTOSC (500 kHz)
`0010`	HFINTOSC
`0001`	F_OSC (System Clock)
`0000`	F_OSC/4

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.