Introduction

The application waypointing is a technique to detect faults in a system with two processors running the identical applications where the outputs from each processor are compared periodically. The two processors running the identical applications provide the spatial separation, and the temporal separation can be introduced by starting the second processor after a certain delay. This white paper describes how to implement application waypointing on PolarFire SoC FPGAs, and presents the measured temporal separation for different target memories.

The application waypointing is implemented for CoreMark application which is 62 KB in size. The CoreMark application is executed from different target memories (LPDDR4 memory, ScratchPad, or LIM) and the results are captured. The temporal separation between the processors is application dependent. As an example, the temporal separation of 50 µs or 5 ms has been used in this white paper.

The following table lists the system configuration for waypointing application.

Table . System Configuration
System ConfigurationDescription
Product and ArchitecturePolarFire SoC FPGA, RISC-V 64-bit
Hardware PlatformIcicle Kit
BareMetal ApplicationCoreMark (Size, 62 KB)
Temporal Separation50 µs or 5 ms
CPU Core Frequency600 MHz
External Memory AccessLPDDR4
LPDDR4 Frequency800 MHz
CompilerGCC
Toolchainriscv64-unknown-elf-gcc (v8.3.0)