3 Initial Crystal Calibration

Adjust the initial value xtrim_freq_val [7.0] = 128 in register A3 to compensate for the initial drift of the crystal. The device generates a 4.0 MHz clock at pin MST_CLK once the VDDcore = 1.25V supply is applied and the N_RST pin is released.

The deviation of the measured clock frequency to the expected frequency in [ppm]:

dF[ppm] = (4,000,000 Hz - Fmst_clk [Hz]) / 4,000,000 Hz

can be used to correct the value of xtrim_freq_val [7.0], in other words, with 1 step = 1.5 ppm.

Enable the GPO Test mode 1 using the A21 register (GPO test register) settings (see the following table) if the MST_CLK pin is not accessible.

Table 3-1. A21 Register Configuration Settings
Configuration Bits (A21)Description
GPO_select[5:0]

Select GPO test mode:

00001 = Crystal Test mode on GPO3 pin

Configuration bits (A3)Command bits
xtrim_freq_val[7:0]Trimming value for the crystal clock = 10000000 (default)

The 48 MHz crystal clock is, then, available on pin GPO3.

The deviation of the measured crystal clock frequency to the expected frequency in [ppm]:

dF[ppm] = (48,000,000Hz - Fxtal[Hz]) / 48,000,000Hz

can be used to correct the value of xtrim_freq_val[7:0], i.e., with 1 step = 1.5 ppm.

This crystal calibration eliminates most of the initial distance offset compensation. Together with the frequency offset compensation, the remaining offset due to aging and temperature are compensated on-the-fly during a distance-bounding measurement using the PRo and VRo mode.

The crystal trimming occurs due to the trimming curves of the crystal oscillator and the step size of the trimming parameter xtrim_freq_val[7:0].
Figure 3-1. Crystal Trimming with xtrim_freq_val[7:0]
Perform the following to set the device to IDLE mode
  1. Load all registers with the default value.
  2. Set the parameter xtrim_freq_val [7:0] to 128 and load into register A3.
  3. Measure the clock at pin MST_CLK or GPO3 (enabled with GPO Test mode 1).
  4. Measure the clock at pin MST_CLK or GPO3 (enabled with GPO Test mode 1).
    If |MST_CLK – 4.0 MHz| or |GPO3 – 48.0 MHz| is minimum, then
stop
else
 	If MST_CLK < 4.0 MHz or GPO3 < 48.0 MHz then
 		increment xtrim_freq_val
 	else
 		decrement xtrim_freq_val
  5. Continue with step 4.