27.8.6 ADCH – ADC Data Register High (ADLAR=1)
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
| Name: | ADCH |
| Offset: | 0x05 |
| Reset: | 0x00 |
| Property: | When addressing I/O Registers as data space the offset address is 0x25 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADCn[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:0 – ADCn[7:0] ADC Conversion Result [n = 7:0]
Refer to ADCL.