18.3.1 Alternate Functions of Port B
The Port B pins with alternate functions are shown in the table below:
Port Pin | Alternate Functions |
---|---|
PB7 | XTAL2 (Chip Clock Oscillator pin 2) TOSC2 (Timer Oscillator pin 2) |
PB6 | XTAL1 (Chip Clock Oscillator pin 1 or External clock input) TOSC1 (Timer Oscillator pin 1) |
PB5 | SCK (SPI Bus Master clock Input) |
PB4 | MISO (SPI Bus Master Input/Slave Output) |
PB3 | MOSI (SPI Bus Master Output/Slave Input) OC2 (Timer/Counter2 Output Compare Match Output) |
PB2 | SS (SPI Bus Master Slave select) OC1B (Timer/Counter1 Output Compare Match B Output) |
PB1 | OC1A (Timer/Counter1 Output Compare Match A Output) |
PB0 | ICP1 (Timer/Counter1 Input Capture Pin) |
The alternate pin configuration is as follows:
• XTAL2/TOSC2 – Port B, Bit 7
XTAL2: Chip clock Oscillator pin 2. Used as clock pin for crystal Oscillator or Low-frequency crystal Oscillator. When used as a clock pin, the pin can not be used as an I/O pin.
TOSC2: Timer Oscillator pin 2. Used only if internal calibrated RC Oscillator is selected as chip clock source, and the asynchronous timer is enabled by the correct setting in ASSR. When the AS2 bit in ASSR is set (one) to enable asynchronous clocking of Timer/Counter2, pin PB7 is disconnected from the port, and becomes the inverting output of the Oscillator amplifier. In this mode, a crystal Oscillator is connected to this pin, and the pin cannot be used as an I/O pin
If PB7 is used as a clock pin, DDB7, PORTB7 and PINB7 will all read 0.
• XTAL1/TOSC1 – Port B, Bit 6
XTAL1: Chip clock Oscillator pin 1. Used for all chip clock sources except internal calibrated RC Oscillator. When used as a clock pin, the pin can not be used as an I/O pin.
TOSC1: Timer Oscillator pin 1. Used only if internal calibrated RC Oscillator is selected as chip clock source, and the asynchronous timer is enabled by the correct setting in ASSR. When the AS2 bit in ASSR is set (one) to enable asynchronous clocking of Timer/Counter2, pin PB6 is disconnected from the port, and becomes the input of the inverting Oscillator amplifier. In this mode, a crystal Oscillator is connected to this pin, and the pin can not be used as an I/O pin.
If PB6 is used as a clock pin, DDB6, PORTB6 and PINB6 will all read 0.
• SCK – Port B, Bit 5
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB5. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB5. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB5 bit.
• MISO – Port B, Bit 4
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as a Master, this pin is configured as an input regardless of the setting of DDB4. When the SPI is enabled as a Slave, the data direction of this pin is controlled by DDB4. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB4 bit.
• MOSI/OC2 – Port B, Bit 3
MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB3. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB3. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB3 bit.
OC2, Output Compare Match Output: The PB3 pin can serve as an external output for the Timer/Counter2 Compare Match. The PB3 pin has to be configured as an output (DDB3 set (one)) to serve this function. The OC2 pin is also the output pin for the PWM mode timer function.
• SS/OC1B – Port B, Bit 2
SS: Slave Select input. When the SPI is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB2. As a Slave, the SPI is activated when this pin is driven low. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB2. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB2 bit.
OC1B, Output Compare Match output: The PB2 pin can serve as an external output for the Timer/Counter1 Compare Match B. The PB2 pin has to be configured as an output (DDB2 set (one)) to serve this function. The OC1B pin is also the output pin for the PWM mode timer function.
• OC1A – Port B, Bit 1
OC1A, Output Compare Match output: The PB1 pin can serve as an external output for the Timer/Counter1 Compare Match A. The PB1 pin has to be configured as an output (DDB1 set (one)) to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.
• ICP1 – Port B, Bit 0
ICP1 – Input Capture Pin: The PB0 pin can act as an Input Capture Pin for Timer/Counter1.
The tables below relate the alternate functions of Port B to the overriding signals shown in figure Figure 18-5. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
Signal Name | PB7/XTAL2/ TOSC2(1)(2) | PB6/XTAL1/ TOSC1(1) | PB5/SCK | PB4/MISO |
---|---|---|---|---|
PUOE | EXT • (INTRC + AS2) | INTRC + AS2 | SPE • MSTR | SPE • MSTR |
PUO | 0 | 0 | PORTB5 • PUD | PORTB4 • PUD |
DDOE | EXT • (INTRC + AS2) | INTRC + AS2 | SPE • MSTR | SPE • MSTR |
DDOV | 0 | 0 | 0 | 0 |
PVOE | 0 | 0 | SPE • MSTR | SPE • MSTR |
PVOV | 0 | 0 | SCK OUTPUT | SPI SLAVE OUTPUT |
DIEOE | EXT • (INTRC + AS2) | INTRC + AS2 | 0 | 0 |
DIEOV | 0 | 0 | 0 | 0 |
DI | – | – | SCK INPUT | SPI MSTR INPUT |
AIO | Oscillator Output | Oscillator/Clock Input | – | – |
- INTRC means that the internal RC Oscillator is selected (by the CKSEL Fuse).
- EXT means that the external RC Oscillator or an external clock is selected (by the CKSEL Fuse).
Signal Name | PB3/MOSI/ OC2 | PB2/SS/ OC1B | PB1/OC1A | PB0/ICP1 |
---|---|---|---|---|
PUOE | SPE • MSTR | SPE • MSTR | 0 | 0 |
PUO | PORTB3 • PUD | PORTB2 • PUD | 0 | 0 |
DDOE | SPE • MSTR | SPE • MSTR | 0 | 0 |
DDOV | 0 | 0 | 0 | 0 |
PVOE | SPE • MSTR + OC2 ENABLE | OC1B ENABLE | OC1A ENABLE | 0 |
PVOV | SPI MSTR OUTPUT + OC2 | OC1B | OC1A | 0 |
DIEOE | 0 | 0 | 0 | 0 |
DIEOV | 0 | 0 | 0 | 0 |
DI | SPI SLAVE INPUT | SPI SS | – | ICP1 INPUT |
AIO | – | – | – | – |