15.6.2 WDTCR – Watchdog Timer Control Register

When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.

Name: WDTCR
Offset:  0x21
Reset: 0x00
Property: When addressing I/O Registers as data space the offset address is 0x41

Bit 76543210 
    WDCEWDEWDPn[2:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bit 4 – WDCE Watchdog Change Enable

This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog will not be disabled. Once written to one, hardware will clear this bit after four clock cycles. Refer to the description of the WDE bit for a Watchdog disable procedure. In Safety Level 1 and 2, this bit must also be set when changing the prescaler bits. See Code Examples.

Bit 3 – WDE Watchdog Enable

When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is written to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared if the WDCE bit has logic level one. To disable an enabled Watchdog Timer, the following procedure must be followed:
  1. In the same operation, write a logic one to WDCE and WDE. A logic one must be written to WDE even though it is set to one before the disable operation starts.
  2. Within the next four clock cycles, write a logic 0 to WDE. This disables the Watchdog.

Bits 2:0 – WDPn[2:0] Watchdog Timer Prescaler 2, 1, and 0 [n = 2:0]

The WDP2, WDP1, and WDP0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is enabled. The different prescaling values and their corresponding Timeout Periods are shown in the table below.

Table 15-1. Watchdog Timer Prescale Select
WDP2WDP1WDP0Number of WDT Oscillator CyclesTypical Time-out at VCC = 3.0VTypical Time-out at VCC = 5.0V
00016K (16,384)17.1ms16.3ms
001 32K (32,768)34.3ms32.5ms
010 64K (65,536)68.5ms65ms
011 128K (131,072)0.14s0.13s
100 256K (262,144)0.27s0.26s
101512K (524,288)0.55s0.52s
110 1,024K (1,048,576)1.1s1.0s
111 2,048K (2,097,152)2.2s2.1s