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ATmega8A Data Sheet

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12 AVR Memories
12.6 Register Description

Introduction
Features
1 Description
2 Configuration Summary
3 Ordering Information
4 Block Diagram
5 Pin Configurations
6 I/O Multiplexing
7 Resources
8 Data Retention
9 About Code Examples
10 Capacitive Touch Sensing
11 AVR CPU Core
12 AVR Memories
- 12.1 Overview
- 12.2 In-System Reprogrammable Flash Program Memory
- 12.3 SRAM Data Memory
- 12.4 EEPROM Data Memory
- 12.5 I/O Memory
- 12.6 Register Description
  - 12.6.1 EEARL – The EEPROM Address Register Low
    EEARL – The EEPROM Address Register Low
  - 12.6.2 EEARH – The EEPROM Address Register High
    EEARH – The EEPROM Address Register High
  - 12.6.3 EEDR – The EEPROM Data Register
    EEDR – The EEPROM Data Register
  - 12.6.4 EECR – The EEPROM Control Register
    EECR – The EEPROM Control Register
13 System Clock and Clock Options
14 Power Management and Sleep Modes
15 System Control and Reset
16 Interrupts
17 External Interrupts
18 I/O Ports
19 8-bit Timer/Counter0
20 Timer/Counter0 and Timer/Counter1 Prescalers
21 16-bit Timer/Counter1
22 8-bit Timer/Counter2 with PWM and Asynchronous Operation
23 SPI – Serial Peripheral Interface
24 USART - Universal Synchronous and Asynchronous serial Receiver and Transmitter
25 TWI - Two-wire Serial Interface
26 AC - Analog Comparator
27 ADC - Analog to Digital Converter
28 BTLDR - Boot Loader Support – Read-While-Write Self-Programming
29 MEMPROG- Memory Programming
30 Electrical Characteristics – TA = -40°C to 85°C
31 Electrical Characteristics – TA = -40°C to 105°C
32 Typical Characteristics – TA = -40°C to 85°C
33 Typical Characteristics – TA = -40°C to 105°C
34 Register Summary
35 Instruction Set Summary
36 Packaging Information
37 Errata
38 Appendix A: Revision History
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12.6 Register Description

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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