9.8.7.32 PWM Debug Register

This register can only be written if bits WPSWS2 and WPHWS2 are cleared in the PWM Write Protection Status Register.

Name: PWM_DEBUG
Offset: 0xAC
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
        OUTMODE 
Access R/W 
Reset 0 

Bit 0 – OUTMODE PWM Output Mode when System is in Debug Mode

0 (NO_EFFECT): Keeps the PWM outputs running when the processor reports a debug operating mode.

1 (STUCK_AT): Forces the PWM outputs with the values configured in PWM_FPVx as soon as the processor reports a debug operating mode. See PWM_FPV1 and PWM_FPV2.