9.7.5.1 Introduction

The I3CC is responsible for generating the I3C bus clock, issuing the commands, and controlling the data transfer.

Each I3C device has a unique address that is assigned by the I3CC through the Dynamic Address Assignment (DAA) during cold power-up or during a hot-join of the I3C device to the system.

The facing I3C devices are responsible for responding to the commands, transmitting or receiving data to/from the I3CC, and acknowledging to the I3CC that the transfer is successful.