19.6 Peripheral Dependencies
| Peripheral Name | Base Address |
NVIC IRQ Index:Source |
MCLK AHB/APB Clock Enable Bus:Register:Bit |
GCLK Peripheral Channel Control Register |
PAC Peripheral Identifier PERID:Register:Bit |
DMA Trigger Index:Source |
Event System Type:Event: Register:Path | Power Domain |
|---|---|---|---|---|---|---|---|---|
| OSCCTRL | 0x44006000 |
4 : XOSCRDY/XOSCFAIL/CLKFAIL 5 : DFLLRDY/DFLLLOCK/DFLLOVF/DFLLUNF/DFLLRCS/DFLLFAIL 6 : PLLLOCKR_0/PLLLOCKF_0 |
APB: CLKMSK[0] MASK6 |
DFLL48M: PCHCTRL[0] PLL: PCHCTRL[1] |
6 STATUS0 PERID6 |
Generators: XOSCFAIL: CHANNEL[2] |
PD_CORE_SW |