17.4 Signal Description
The DSU uses these signals to function.
| Signal Name | Type | Description |
|---|---|---|
| RESET | Digital Input | External Reset |
| SWCLK/TCK | Digital Input | Serial Wire Debug (SWD) clock / JTAG Test Clock |
| SWDIO/TMS | Digital I/O | Serial Wire Debug (SWD) bidirectional data pin / JTAG Test Mode Select |
| TDI | Digital Input | JTAG Test Data In |
| TDO | Digital Output | JTAG Test Data Out |
Note:
- By default the Debug Port (DP) starts in JTAG mode after Power-on Reset, but it can switch to Single Wire Debug (SWD) mode using the Arm JTAG to SWD switching sequence.