28.5 Peripheral Dependencies
| Peripheral Name | Base Address |
NVIC IRQ Index:Source |
MCLK AHB/APB Clock Enable Bus:Register:Bit |
GCLK Peripheral Channel Control Register |
PAC Peripheral Identifier PERID:Register:Bit |
DMA Trigger Index:Source |
Event System Type:Event: Register:Path | Power Domain |
|---|---|---|---|---|---|---|---|---|
| PM | 0x45000000 |
2 : SLEEPRDY |
APB: CLKMSK[0] MASK3 | --- |
3 STATUS0 PERID3 |
PD_CORE_SW |