1.4.1 Register Naming Conventions

The registers are divided into control, status, and data registers, and the names of the registers reflect this. A general purpose control register of a module is named CTRL. If multiple general purpose control registers exist in the same module, they will be differentiated by a suffix character. In this case, the control registers will be named CTRLA, CTRLB, CTRLC, and so on. This also applies to status registers.

For registers that have a specific function, the name reflects their functionality. For example, a control register that controls the interrupts of a module is named INTCTRL.

Since, for the microcontrollers presented in this document, the data bus width is 8-bit, larger registers are implemented using several 8-bit registers. For a 16-bit register, the high and low bytes are accessed by appending H and L respectively to the register name. For example, the 16-bit Analog-to-Digital Result register is named RES. The two bytes are named RESL (RES-Low, the Least Significant Byte of the register) and RESH (RES-High, the Most Significant Byte of the register). Another way to identify multiple registers with the same name is to add a number suffix; for example, the ADDR register in NVMCTRL is a 24-bit register, for the AVR DA family. The three bytes that can be accessed using the number suffix are ADDR0, ADDR1 and ADDR2.

Most C compilers offer automatic handling of access to multibyte registers. In that case, the name RES, without H or L suffix, can be used to perform a 16-bit access to the ADC Result register. This is also the case for 32-bit registers.

Additionally, the registers that contain the SET/CLR suffix allow the user to set and clear bits in those registers without doing a Read-Modify-Write operation since it is implemented in hardware. These registers come in pairs. Writing a logic ‘1’ to a bit in the CLR register will clear the corresponding bit in both registers, while writing a logic ‘1’ to a bit in the SET register will set the corresponding bits in both registers. For example, in the PORT module, writing a logic ‘1’ to a bit in the Data Direction Set (DIRSET) register will clear the corresponding bit in the Data Direction (DIR) and Data Direction Clear (DIRCLR) registers. Both registers will return the same value when read. If both registers are written simultaneously, the write to the CLR register will take precedence.