7.5 Digital I/O Pin Behavior During Power-up Sequences
The following table represents digital I/O pin states corresponding to device power modes.
Device state | VDDIO | CHIP_EN | RESETN | Output driver | Input driver | Pull up/down resistor (96kΩ) |
---|---|---|---|---|---|---|
Power-Down: core supply off | High | Low | Low | Disabled (Hi-Z) | Disabled | Disabled |
Power-on Reset: core supply on, hard reset on | High | High | Low | Disabled (Hi-Z) | Disabled | Enabled |
Power-On Default: core supply on, the device is out of reset but not programmed yet | High | High | High | Disabled (Hi-Z) | Enabled | Enabled |
On Sleep/ On Transmit/ On Receive: core supply on, device programmed by firmware | High | High | High | Programmed by firmware for each pin: Enabled or Disabled | Opposite of Output Driver state | Programmed by firmware for each pin: Enabled or Disabled |