CPU clock: 10 MHz in Active mode,
5 MHz in Standby sleep mode
Peripherals used:
ADC in differential
mode
PGA set to 16x gain
ADC MUXPOS input
channel is AIN9: pin PB4
ADC MUXNEG input
channel is AIN5: pin PA5
ADC reference
voltage: 1.024V
ADC clock: 2.5
MHz (FCPU/2)
ADC triggered
trough the Event System
RTC/PIT:
RTC clock running
at 1024 Hz
PIT/256 connected
to ADC trough the event system. The conversion trigger rate is 4
Hz.
PIT/256 connected
to the event out pin PB7. LED0 toggle rate is 4 Hz when movement
is detected.
PIT/1024
connected to the event out pin PB7. LED0 toggle rate is 1 Hz
during warm-up.
Event System
Connects PIT to ADC
Connects PIT to
LED0
USART0:
TXD: PB2
RXD: PB3
Baud rate:
115200, ADC result is sent to the serial terminal
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
