1.36 TCM Cache Coherency
This example shows how to maintain cache coherency by allocating the DMA buffers in the Tightly Coupled Memory (TCM), which are not cacheable.
Description
This example application shows how to use the data TCM to ensure a high-speed, low latency, and deterministic access to data. TCM is a memory accessed by a dedicated connection from the core. Access to the TCM memory is at full processor clock speed and can be accessed both by the CPU and the DMA. TCM provides deterministic behavior as it does not suffer from cache hit and cache miss. There is no explicit or extra memory for TCM. It is the internal SRAM of the microcontroller that gets partitioned as TCM + SRAM.
This application uses the USART and the DMA PLIBs to demonstrate the TCM usage. It registers a callback with the DMA transmit and receive channels. Application first transmits a message using DMA transmit channel and then schedules a read of ten characters using the DMA receive channel. Once the DMA read is complete, it reads the received data and echoes the same on the terminal using the DMA transmit channel.
Unlike the cache maintenance APIs, using the TCM does not pose restrictions on aligning the read and write buffers to a 32-byte boundary with a size that is a multiple of 32 bytes. An XC32 compiler attribute can be used to place the read and write buffers into the TCM memory region to avoid the issues related to cache coherency when the DMA is used with the data cache enabled.
Downloading and Building the Application
To clone or download this application from Github, go to the main page of this repository and then click Clone button to clone this repository or download as zip file. This content can also be downloaded using content manager by following these instructions.
Path of the application within the repository is apps/tcm/data_tcm/firmware.
To build the application, refer to the following table and open the project using its IDE.
| Project Name | Description |
|---|---|
| pic32cz_ca70_curiosity_ultra.X | MPLABX project for PIC32CZ CA70 Curiosity Ultra Development Kit |
Setting Up the Hardware
The following table shows the target hardware for the application projects.
| Project Name | Description |
|---|---|
| pic32cz_ca70_curiosity_ultra.X | PIC32CZ CA70 Curiosity Ultra Development Kit |
Setting Up PIC32CZ CA70 Ultra Curiosity Development Kit
- Connect the Debug USB port on the board to the computer using a micro USB cable
Running the Application
- Open the Terminal application (Ex.:Tera term) on the computer
- Connect to the PICkit4 On Board
Virtual COM port and configure the serial settings as follows:
- Baud : 115200
- Data : 8 Bits
- Parity : None
- Stop : 1 Bit
- Flow Control : None
- Build and Program the application using its IDE
- The console displays the following message
- Type 10 characters in the terminal. It will echo back the received bytes and toggles the LED
- The following table provides the LED names:
Board LED Name PIC32CZ CA70 Curiosity Ultra Development Kit LED0