7.1 Byte Write

The AT24CSW04X/AT24CSW08X supports the writing of a single 8-bit byte. Selecting a data word in the AT24CSW04X requires a 9-bit word address, while selecting a data word in the AT24CSW08X requires a 10-bit word address.

Upon receipt of the proper device address and the word address bytes, the EEPROM will send an Acknowledge. The device will then be ready to receive the 8-bit data word. Following receipt of the 8‑bit data word, the EEPROM will respond with an ACK. The addressing device, such as a bus master, must then terminate the write operation with a Stop condition. At that time, the EEPROM will enter an internally self-timed write cycle, which will be completed within tWR, while the data word is being programmed into the nonvolatile EEPROM. All inputs are disabled during this write cycle, and the EEPROM will not respond until the write is complete.

Figure 7-1. Byte Write
Note:
  1. For the AT24CSW04X, the @ indicates the A1 Hardware Address bit which is managed by the ordering code (see Table 6-3). For the AT24CSW08X, the @ indicates the A9 address bit.
  2. # indicates the hardware address value which is managed by the ordering code of the device (see Table 6-3 and Table 6-4).