41.5.13 Synchronization

Due to asynchronicity between the main clock domain and the peripheral clock domains, some registers need to be synchronized when written or read.

The following bits are synchronized when written:

The Software Reset bit in the Control register (CTRLA.SWRST)
The Enable bit in the Control register (CTRLA.ENABLE)
The Enable bit in the Comparator Control register (COMPCTRLn.ENABLE)

The following registers are synchronized when written:

The Window Control register (WINCTRL)

Required write synchronization is denoted by the Write-Synchronized property in the register description.

DS60001921A

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