32.6.2.1 Initialization

The EIC must be initialized in the following order:

1. Enable CLK_EIC_APB.
2. If required, configure the NMI by writing the Non-Maskable Interrupt Control (NMICTRL) register.
3. Enable GCLK_EIC or CLK_ULP32K when one of the following external interrupt, EIC_EXTINTx pins, modes is selected:
   • EIC_EXTINT pin filtering
   • EIC_EXTINT pin synchronous edge detection
   • EIC_EXTINT pin de-bouncing
   GCLK EIC is used when a frequency higher than 32 kHz is required for filtering. CLK ULP32K is recommended when power consumption is the priority. For CLK ULP32K write a '1' to the Clock Selection bit in the Control A register (CTRLA.CKSEL).
4. Configure the EIC input sense and filtering by writing the Configuration n register (CONFIG).
5. Optionally, enable the Asynchronous mode.
6. Optionally, enable the Debounce mode.
7. Enable the EIC by writing a '1' to CTRLA.ENABLE.

The following bits are enable-protected, meaning that it can only be written when the EIC is disabled (CTRLA.ENABLE=0):

• Clock Selection bit in Control A register (CTRLA.CKSEL).

The following registers are enable-protected:

• Event Control register (EVCTRL).
• Configuration n register (CONFIG).
• External Interrupt Asynchronous Mode register (ASYNCH).
• Debouncer Enable register (DEBOUNCEN).
• Debounce Prescaler register (DPRESCALER).