38.6.2.4 USB Reset

The USB bus reset is initiated by a connected host and managed by hardware.

During USB reset the following registers are cleared:

• The Device Endpoint Configuration (EPCFG) register - except for Endpoint 0
• The Device Frame Number (FNUM) register
• The Device Address (DADD) register
• The Device Endpoint Interrupt Enable Clear/Set (EPINTENCLR/SET) register
• The Device Endpoint Interrupt Flag (EPINTFLAG) register
• The Transmit Stall '0' bit in the Endpoint Status (EPSTATUS.STALLRQ0) register
• The Transmit Stall '1' bit in the Endpoint Status (EPSTATUS.STALLRQ1) register
• The Endpoint Interrupt Summary (EPINTSMRY) register
• The Upstream resume bit in the Control B (CTRLB.UPRSM) register

At the end of the reset process, the End of Reset bit is set in the Interrupt Flag register (INTFLAG.EORST).