2 PWM to Switch Mapping

The PWM instance-to-switch mapping can be arbitrary. The dsPIC33A devices allow routing of the PWM outputs to any remappable pin (RPx) for additional flexibility. The PWM instance mapping used in this example was chosen to allow sharing of the PWM and APWM master period, duty cycle and phase registers (MPER, MDC, MPHASE). This reduces the number of registers to write during operation. All of the auxiliary PWM Generators (APG) are located on the secondary side. The 24 PWM outputs are mapped to their corresponding switch per Table 2-1 below.

Table 2-1. PWM Mapping
Bank	Phase	Switch Position	Switch Designator	PWM output
1	A	Primary High	QAP_H	PWM1H
		Primary Low	QAP_L	PWM1L
		Secondary High	QAS_H	PWM2H
		Secondary Low	QAS_L	PWM2L
	B	Primary High	QBP_H	PWM3H
		Primary Low	QBP_L	PWM3L
		Secondary High	QBS_H	APWM1H
		Secondary Low	QBS_L	APWM1L
	C	Primary High	QCP_H	PWM4H
		Primary Low	QCP_L	PWM4L
		Secondary High	QCS_H	APWM2H
		Secondary Low	QCS_L	APWM2L
2	A	Primary High	QAP_H	PWM5H
		Primary Low	QAP_L	PWM5L
		Secondary High	QAS_H	PWM6H
		Secondary Low	QAS_L	PWM6L
	B	Primary High	QBP_H	PWM7H
		Primary Low	QBP_L	PWM7L
		Secondary High	QBS_H	APWM3H
		Secondary Low	QBS_L	APWM3L
	C	Primary High	QCP_H	PWM8H
		Primary Low	QCP_L	PWM8L
		Secondary High	QCS_H	APWM4H
		Secondary Low	QCS_L	APWM4L