10.2.2 DIAG_SRAM_CheckerBoard

The device specific memory space the SRAM on each device is defined by the start address macro INTERNAL_SRAM_START and end address macro INTERNAL_SRAM_END, with a size defined in the INTERNAL_SRAM_SIZE macro. In order to make the test non-destructive and allow for both periodic testing with application data in SRAM and testing on startup, the memory under test is divided into sections of a configurable size defined by SRAM_SEC_SIZE. For each section tested, the current content of the section is first copied to a buffer (checkerbrd_buffer) before the checkerboard algorithm is run on the section. If no error is detected, the original content of the section is restored. If an error is detected while reading the checkerboard pattern in SRAM, the test algorithm is aborted and the value of the non-faulty addresses in the current section under test is restored to their original values. An additional check is performed to verify that the data is copied correctly both to and from the buffer. The first memory section, starting at the INTERNAL_SRAM_START address, is reserved for the buffer and has a length of SRAM_SEC_SIZE. The address space of the buffer itself can be safely included in the test, where its content is not backed up unless the start address of the test is in the middle of the buffer, resulting in a section under test that partially includes the buffer and the following SRAM data. In this scenario, the data outside the buffer address space is copied to the part of the buffer not under test. Finally, if the size of the memory under test is not a multiple of SRAM_SEC_SIZE, the test is performed on the remainder as a separate section in the end.

CheckerBoard algorithm is executed in below 4 steps:

• Step-1: Write checkerboard pattern with up addressing order
• Step-2: Read checkerboard pattern with up addressing order
• Step-3: Write inverse checkerboard pattern with up addressing order
• Step-4: Read inverse checkerboard pattern with up addressing order Global interrupts are disabled during the test and restored to the original state before returning.