5.3 Acknowledge and No-Acknowledge

After each byte of data is received, the receiving device must confirm with the transmitting device that it has successfully received the data byte by responding with what is known as an Acknowledge (ACK). An ACK occurs when the transmitting device first releases the SDA line at the falling edge of the eighth clock cycle, followed by the receiving device responding with a logic ‘0’ throughout the ninth clock cycle’s high period.

When the AT24CS32 is transmitting data to the host, the host can indicate that it has finished receiving data and wants to end the operation by sending a logic  ‘1’ response to the AT24CS32 instead of an ACK response during the ninth clock cycle. This is known as a No-Acknowledge (NACK) and is accomplished when the host sends a logic ‘1’ during the ninth clock cycle, at which point the AT24CS32 will release the SDA line so the host can then generate a Stop condition.

The transmitting device, which can be either the bus host or the Serial EEPROM, must release the SDA line at the falling edge of the eighth clock cycle to allow the receiving device to drive the SDA line to a logic ‘0’ to ACK the previous 8-bit word. The receiving device must release the SDA line at the end of the ninth clock cycle to allow the transmitter to continue sending new data. A timing diagram is provided in Figure 5-1 to better illustrate these requirements.