23.12.2 CCPTMRS0
| Name: | CCPTMRS0 |
| Offset: | 0xFAD |
CCP Timers Control Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| C4TSEL[1:0] | C1TSEL[1:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 1 | 0 | 1 | |||||
Bits 3:2 – C4TSEL[1:0] CCP4 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
CCP4 is based off Timer7 in Capture/Compare mode and Timer8 in PWM mode |
| 10 |
CCP4 is based off Timer5 in Capture/Compare mode and Timer6 in PWM mode |
| 01 |
CCP4 is based off Timer3 in Capture/Compare mode and Timer4 in PWM mode |
| 00 |
CCP4 is based off Timer1 in Capture/Compare mode and Timer2 in PWM mode |
Bits 3:2 – C3TSEL[1:0] CCP3 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
CCP3 is based off Timer7 in Capture/Compare mode and Timer8 in PWM mode |
| 10 |
CCP3 is based off Timer5 in Capture/Compare mode and Timer6 in PWM mode |
| 01 |
CCP3 is based off Timer3 in Capture/Compare mode and Timer4 in PWM mode |
| 00 |
CCP3 is based off Timer1 in Capture/Compare mode and Timer2 in PWM mode |
Bits 3:2 – C2TSEL[1:0] CCP2 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
CCP2 is based off Timer7 in Capture/Compare mode and Timer8 in PWM mode |
| 10 |
CCP2 is based off Timer5 in Capture/Compare mode and Timer6 in PWM mode |
| 01 |
CCP2 is based off Timer3 in Capture/Compare mode and Timer4 in PWM mode |
| 00 |
CCP2 is based off Timer1 in Capture/Compare mode and Timer2 in PWM mode |
Bits 1:0 – C1TSEL[1:0] CCP1 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
CCP1 is based off Timer7 in Capture/Compare mode and Timer8 in PWM mode |
| 10 |
CCP1 is based off Timer5 in Capture/Compare mode and Timer6 in PWM mode |
| 01 |
CCP1 is based off Timer3 in Capture/Compare mode and Timer4 in PWM mode |
| 00 |
CCP1 is based off Timer1 in Capture/Compare mode and Timer2 in PWM mode |