18.1 PPS Inputs

Each peripheral has a PPS register with which the input pin to the peripheral is selected. Although each peripheral has its own PPS input selection register, the selections are identical for every peripheral, as shown in xxxPPS. Not all ports are available for input, as shown in the “PPS Input Selection Register Details” table.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = INT for the INTPPS register.

Table 18-1. PPS Input Selection Register Details
Peripheral	PPS Input Register	Default Pin Selection  at POR	Register Reset Value  at POR	PORT From Which Input Is Available
Interrupt 0	INT0PPS	RB0	0x08	A	B	—	—	—	—	—	—
Interrupt 1	INT1PPS	RB1	0x09	—	B	C	—	—	—	—	—
Interrupt 2	INT2PPS	RB2	0x0A	—	B	—	D	—	—	—	—
Interrupt 3	INT3PPS	RB3	0x0B	—	B	—	—	E	—	—	—
Timer0 Clock	T0CKIPPS	RA4	0x04	A	B	—	—	—	—	—	—
Timer1 Clock	T1CKIPPS	RC0	0x10	A	—	C	D	—	—	—	—
Timer1 Gate	T1GPPS	RB5	0x0D	—	B	C	—	—	—	—	—
Timer3 Clock	T3CKIPPS	RB5	0x0D	—	B	C	—	—	—	—	—
Timer3 Gate	T3GPPS	RA5	0x05	A	—	C	—	—	—	—	—
Timer5 Clock	T5CKIPPS	RD1	0x19	A	—	—	D	E	—	—	—
Timer5 Gate	T5GPPS	RG4	0x34	—	B	—	—	E	—	G	—
Timer7 Clock	T7CKIPPS	RG4	0x34	A	—	—	—	E	—	G	—
Timer7 Gate	T7GPPS	RD1	0x19	—	B	—	D	E	—	—	—
Timer2 Clock	T2INPPS	RA1	0x01	A	—	C	—	—	—	—	—
Timer4 Clock	T4INPPS	RE4	0x24	—	B	—	—	E	—	—	—
Timer6 Clock	T6INPPS	RC1	0x11	—	B	C	—	—	—	—	—
Timer8 Clock	T8INPPS	RA0	0x00	A	—	—	—	E	—	—	—
ADC Conversion Trigger	ADACTPPS	RH1	0x39	—	B	C	—	—	—	—	H
CCP1	CCP1PPS	RE5	0x25	—	B	C	—	E	—	—	—
CCP2	CCP2PPS	RE4	0x24	—	B	C	—	E	—	—	—
CCP3	CCP3PPS	RE6	0x26	—	B	C	—	E	—	—	—
CCP4	CCP4PPS	RG3	0x33	—	B	—	—	E	—	G	—
CCP5	CCP5PPS	RG4	0x34	—	B	—	—	E	—	G	—
SMT1 Window	SMT1WINPPS	RE6	0x26	A	—	C	—	E	—	—	—
SMT1 Signal	SMT1SIGPPS	RE7	0x27	—	B	C	—	E	—	—	—
SMT2 Window	SMT2WINPPS	RG6	0x36	A	—	C	—	—	—	G	—
SMT2 Signal	SMT2SIGPPS	RG7	0x37	—	B	C	—	—	—	G	—
CWG	CWG1PPS	RC2	0x12	A	—	C	—	—	—	—	—
DSM Carrier Low	MDCARLPPS	RD3	0x1B	A	—	—	D	—	—	—	H
DSM Carrier High	MDCARHPPS	RD4	0x1C	A	—	—	D	—	—	—	H
DSM Source	MDSRCPPS	RD5	0x1D	A	—	—	D	—	—	—	H
MSSP1 Clock	SSP1CLKPPS	RC3	0x13	—	B	C	—	—	—	—	—
MSSP1 Data	SSP1DATPPS	RC4	0x14	—	B	C	—	—	—	—	—
MSSP1 Client Select	SSP1SSPPS	RF7	0x2F	—	B	—	—	—	—	F	—
MSSP2 Clock	SSP2CLKPPS	RD6	0x1E	—	B	—	D	—	—	—	—
MSSP2 Data	SSP2DATPPS	RD5	0x1D	—	B	—	D	—	—	—	—
MSSP2 Client Select	SSP2SSPPS	RD7	0x1F	—	B	—	D	—	—	—	—
EUSART1 Receive	RX1PPS	RC7	0x17	—	B	C	D	—	—	—	—
EUSART1 Clock	CK1PPS	RC6	0x16	—	B	C	D	—	—	—	—
EUSART2 Receive	RX2PPS	RG2	0x32	—	B	—	D	—	—	G	—
EUSART2 Clock	CK2PPS	RG1	0x31	—	B	—	D	—	—	G	—
EUSART3 Receive	RX3PPS	RE1	0x21	—	B	—	—	E	—	—	—
EUSART3 Clock	CK3PPS	RE0	0x20	—	B	—	—	E	—	—	—
EUSART4 Receive	RX4PPS	RC1	0x11	—	B	C	—	—	—	—	—
EUSART4 Clock	CK4PPS	RC0	0x10	—	B	C	—	—	—	—	—
EUSART5 Receive	RX5PPS	RE3	0x23	—	B	—	—	E	—	G	—
EUSART5 Clock	CK5PPS	RE2	0x22	—	B	—	—	E	—	G	—

Note:

Some pads are configured for I²C logic levels; clock and data signals may be assigned to any of these pins. Assignments to other pins (e.g., RA5) will operate, but logic levels will be standard TTL/ST as selected by the INLVL register.

Table 18-2. PPS Input Register Values
Desired Input Pin	Value to Write to Register
RH3	`11 1011`
RH2	`11 1010`
RH1	`11 1001`
RH0	`11 1000`
RG7	`11 0111`
RG6	`11 0110`
RG5	`11 0101`
RG4	`11 0100`
RG3	`11 0011`
RG2	`11 0010`
RG1	`11 0001`
RG0	`11 0000`
RF7	`10 1111`
RF6	`10 1110`
RF5	`10 1101`
RF4	`10 1100`
RF3	`10 1011`
RF2	`10 1010`
RF1	`10 1001`
RF0	`10 1000`
RE7	`10 0111`
RE6	`10 0110`
RE5	`10 0101`
RE4	`10 0100`
RE3	`10 0011`
RE2	`10 0010`
RE1	`10 0001`
RE0	`10 0000`
RD7	`01 1111`
RD6	`01 1110`
RD5	`01 1101`
RD4	`01 1100`
RD3	`01 1011`
RD2	`01 1010`
RD1	`01 1001`
RD0	`01 1000`
RC7	`01 0111`
RC6	`01 0110`
RC5	`01 0101`
RC4	`01 0100`
RC3	`01 0011`
RC2	`01 0010`
RC1	`01 0001`
RC0	`01 0000`
RB7	`00 1111`
RB6	`00 1110`
RB5	`00 1101`
RB4	`00 1100`
RB3	`00 1011`
RB2	`00 1010`
RB1	`00 1001`
RB0	`00 1000`
RA7	`00 0111`
RA6	`00 0110`
RA5	`00 0101`
RA4	`00 0100`
RA3	`00 0011`
RA2	`00 0010`
RA1	`00 0001`
RA0	`00 0000`