29.3.1 Synchronous Host Mode
The following bits are used to configure the EUSART for synchronous host operation:
- The SYNC bit in the TXxSTA register is set to
‘
1
’ to configure the EUSART for synchronous operation - The CSRC bit in the TXxSTA register is set to
‘
1
’ to configure the EUSART as the host - The SREN bit in the RCxSTA register is set to
‘
0
’ for transmit; SREN =1
for receive (recommended setting to receive one byte) - The CREN bit in the RCxSTA register is set to
‘
0
’ for transmit; CREN =1
to receive continuously - The SPEN bit in the RCxSTA register is set to
‘
1
’ to enable the EUSART interface
Important: Clearing the SREN and CREN bits of the RCxSTA register ensures that the
device is in the Transmit mode, otherwise the device will be configured to receive.