39.3.3 Power-Down Current (IPD)(1,2)

Table 39-3. 
PIC18LF65/66K40 only
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDNote
D200IPDIPD Base0.0529μA3.0V
D201IPD_WDTLow-Frequency Internal Oscillator/WDT0.4310μA3.0V
D202IPD_SOSCSecondary Oscillator (SOSC)0.6513μA3.0V
D203IPD_FVRFVR315160μA3.0VFVRCON = 0x81 or 0x84
D204IPD_BORBrown-out Reset (BOR)91418μA3.0V
D205IPD_LPBORLow-Power Brown-out Reset (LPBOR)0.53.010μA3.0V
D206IPD_HLVDHigh/Low-Voltage Detect (HLVD)31μA3.0V
D207IPD_ADCAADC - Active250μA3.0VADC is converting (4)
D208IPD_CMPComparator304548μA3.0V

Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max. values must be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.
PIC18F65/66K40 only
Standard Operating Conditions (unless otherwise stated), VREGPM = 1
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDNote
D250IPDIPD Base0.4412μA3.0V

D250A

IPDIPD Base20μA3.0VVREGPM = 0
D251IPD_WDTLow-Frequency Internal Oscillator/WDT0.6513μA3.0V
D252IPD_SOSCSecondary Oscillator (SOSC)0.88.515μA3.0V
D253IPD_FVRFVR325362μA3.0VFVRCON = 0x81 or 0x84
D254IPD_BORBrown-out Reset (BOR)141921μA3.0V
D255IPD_LPBORLow-Power Brown-out Reset (LPBOR)0.75.013μA3.0V
D256IPD_HLVDHigh/Low-Voltage Detect (HLVD)32μA3.0V
D257IPD_ADCAADC - Active280μA3.0VADC is converting (4)
D258IPD_CMPComparator314750μA3.0V

Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max. values must be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.