11.1.10.1 Processor Power Consumption in Active Mode

The following table provides the processor power consumption in the following conditions:
  • fCPU_CLK = from 400 MHz to 1000 MHz
  • fMCK1 = 200 MHz
  • fMCK2 = 533 MHz
  • fMCK3 = 266 MHz
  • fMCK4 = 400 MHz
  • L1 caches enabled
  • L2 cache enabled
  • The Cortex-A7 core executes a CoreMark benchmark from the (internal) SRAM
  • Code compiled with speed optimization
  • Peripheral clocks disabled
  • Current measured according to the following figure
Figure 11-49. Current Measurement on VDDCORE and VDDCPU
Table 11-73. Processor Power Consumption running a CoreMark Benchmark from SRAM on AMP1+AMP2
fCPU (MHz)VDDCPU (V)Power (mW)TJ (°C)
-4025507085105125
4001.1PVDDCORE91101110122134155182
PVDDCPU62697788101124157
6001.1PVDDCORE91101110122134155182
PVDDCPU98105113124137160193
8001.15PVDDCORE94104114125137158185
PVDDCPU151159170184200229270
10001.25PVDDCORE103113123135147168–
PVDDCPU227240256276298339–
Figure 11-50. Typical Processor Power Consumption when Running a CoreMark Benchmark