21.4.3 PMD2
Name: | PMD2 |
Offset: | 0x010E |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CLC4MD | CLC3MD | CLC2MD | CLC1MD | CWG1MD | NCO1MD | PWM2MD | |||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 6 – CLC4MD Disable CLC4
Value | Description |
---|---|
1 | CLC4 disabled |
0 | CLC4 enabled |
Bit 5 – CLC3MD Disable CLC3
Value | Description |
---|---|
1 | CLC3 disabled |
0 | CLC3 enabled |
Bit 4 – CLC2MD Disable CLC2
Value | Description |
---|---|
1 | CLC2 disabled |
0 | CLC2 enabled |
Bit 3 – CLC1MD Disable CLC1
Value | Description |
---|---|
1 | CLC1 disabled |
0 | CLC1 enabled |
Bit 2 – CWG1MD Disable CWG1
Value | Description |
---|---|
1 | CWG1 disabled |
0 | CWG1 enabled |
Bit 1 – NCO1MD Disable NCO1
Value | Description |
---|---|
1 | NCO1 disabled |
0 | NCO1 enabled |
Bit 0 – PWM2MD Disable PWM2
Value | Description |
---|---|
1 | PWM2 disabled |
0 | PWM2 enabled |