28.5.4 LUT n Control B

Note:
  1. SPI connections to the CCL work only in master SPI mode.
  2. USART connections to the CCL work only in asynchronous/synchronous USART Master mode.
Name: LUTCTRLB
Offset: 0x06 + n*0x04 [n=0..1]
Reset: 0x00
Property: Enable-Protected

Bit 76543210 
 INSEL1[3:0]INSEL0[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:4 – INSEL1[3:0] LUT n Input 1 Source Selection

This bit field selects the source for input 1 of LUT n:

Value Name Description
0x0 MASK Masked input
0x1 FEEDBACK Feedback input
0x2 LINK Linked other LUT as input source
0x3 EVENT0 Event input source 0
0x4 EVENT1 Event input source 1
0x5 IO I/O-pin LUTn-IN1 input source
0x6 AC0 AC0 OUT input source
0x7 TCB0 TCB0 WO input source
0x8 TCA0 TCA0 WO1 input source
0x9 TCD0 TCD0 WOB input source
0xA USART0 USART0 TXD input source
0xB SPI0 SPI0 MOSI input source
0xC AC1 AC1 OUT input source
0xD TCB1 TCB1 WO input source
0xE AC2 AC2 OUT input source
Other - Reserved

Bits 3:0 – INSEL0[3:0] LUT n Input 0 Source Selection

This bit field selects the source for input 0 of LUT n:

Value Name Description
0x0 MASK Masked input
0x1 FEEDBACK Feedback input
0x2 LINK Linked other LUT as input source
0x3 EVENT0 Event input source 0
0x4 EVENT1 Event input source 1
0x5 IO I/O-pin LUTn-IN0 input source
0x6 AC0 AC0 OUT input source
0x7 TCB0 TCB0 WO input source
0x8 TCA0 TCA0 WO0 input source
0x9 TCD0 TCD0 WOA input source
0xA USART0 USART0 XCK input source
0xB SPI0 SPI0 SCK input source
0xC AC1 AC1 OUT input source
0xD TCB1 TCB1 WO input source
0xE AC2 AC2 OUT input source
Other - Reserved