6.7 Function Priority for Device Pins

The device pins have an associated priority order in which functionality is exhibited on each pin. This priority order impacts the availability of PPS functionality. For example, if enabling SERCOM0, choose the outputs to be High Speed mode in the DEVCFG1 fuses (bit 17), give priority to pins PB9, PA4, PA5 and PA6 and use them as SERCOM0 pins instead of GPIO/PPS pins. The following table provides details for the priority in which functions are brought out on each device pin. Top entry is higher priority and bottom entry is lower priority for each specific pin.

Table 6-12. Priority for Device Pins PAn (n = 0-14)
Pin Name	Function In Priority Order	Reference Peripheral
pa0⁽¹⁾	QSPI_DATA0	QSPI
	RTC_IN3	RTCC
	RPA0	PPS
	IOCA0	Change notification
	RA0	GPIO
pa1⁽¹⁾	QSPI_SCK	QSPI
	RTC_IN2	RTCC
	RPA1	PPS
	IOCA1	Change notification
	RA1	GPIO
pa2⁽¹⁾	QSPI_DATA3	QSPI
	RTC_IN1	RTCC
	RPA2	PPS
	IOCA2	Change notification
	RA2	GPIO
pa3	TRD2	Trace (Debug)
	SCLKI	Secondary oscillator
	DACOUT	DAC
	ANN0	ADC (Differential)
	RTC_IN0	RTCC
	RPA3	PPS
	IOCA3	Change notification
	RA3	GPIO
pa4	SERCOM0_PAD3	SERCOM0
	RTC_OUT	RTCC
	RPA4	PPS
	IOCA4	Change notification
	RA4	GPIO
pa5	SERCOM0_PAD0	SERCOM0
	AC_CMP0	Analog comparator
	RPA5	PPS
	IOCA5	Change notification
	RA5	GPIO
pa6	TRD3	Trace (Debug)
	SERCOM0_PAD1	SERCOM0
	AC_CMP1_ALT	Analog comparator
	RPA6	PPS
	IOCA6	Change notification
	RA6	GPIO
pa7	TRACECLK	Trace (Debug)
	SERCOM1_PAD0	SERCOM1
	RPA7	PPS
	IOCA7	Change notification
	RA7	GPIO
pa8	SERCOM1_PAD1	SERCOM1
	RPA8	PPS
	IOCA8	Change notification
	RA8	GPIO
pa9	SERCOM1_PAD2	SERCOM1
	RTC_IN0_ALT	RTCC
	RPA9	PPS
	IOCA9	Change notification
	RA9	GPIO
pa10	SERCOM1_PAD3	SERCOM1
	RTC_OUT_ALT	RTCC
	RPA10	PPS
	IOCA10	Change notification
	RA10	GPIO
pa11	SOSCI	Secondary oscillator
	RPA11	PPS (Re-mappable input only)
	RA11	GPIO (input only)
pa12	SOSCO	Secondary oscillator
	RPA12	PPS (Re-mappable input only)
	RA12	GPIO (input only)
pa13⁽¹⁾	SERCOM2_PAD0	SERCOM2 (I2C only)
	AC_CMP1	Analog comparator
	RPA13	PPS
	IOCA13	Change notification
	RA13	GPIO
pa14⁽¹⁾	SERCOM2_PAD1	SERCOM2 (I2C)
	RPA14	PPS
	IOCA14	Change notification
	RA14	GPIO
Note: Indicates pins are not available on the 32-pin package and available only on the 48-pin package.

Table 6-13. Priority for Device Pins PBn (n = 0-13)
Pin Name	Function In Priority Order	Reference Peripheral
pb0⁽¹⁾	AN4	ADC
	CVD4	CVD
	CVDR4	CVD
	CVDT4	CVD
	AC_AIN2	Analog comparator
	RPB0	PPS
	IOCB0	Change notification
	RB0	GPIO
pb1⁽¹⁾	AN5	ADC
	CVD5	CVD
	CVDR5	CVD
	CVDT5	CVD
	AC_AIN3	Analog comparator
	RPB1	PPS
	IOCB1	Change notification
	RB1	GPIO
pb2⁽¹⁾	AN6	ADC
	CVD6	CVD
	CVDR6	CVD
	CVDT6	CVD
	AC_AIN0	Analog comparator
	RPB2	PPS
	IOCB2	Change notification
	RB2	GPIO
pb3⁽¹⁾	AN7	ADC
	CVD7	CVD
	CVDR7	CVD
	CVDT7	CVD
	AC_AIN1	Analog comparator
	RPB3	PPS
	IOCB3	Change notification
	RB3	GPIO
pb4	AN0	ADC
	CVD0	CVD
	CVDR0	CVD
	CVDT0	CVD
	RPB4	PPS
	IOCB4	Change notification
	RB4	GPIO
pb5	TRD0	Trace (Debug)
	AN1	ADC
	CVD1	CVD
	CVDR1	CVD
	CVDT1	CVD
	RPB5	PPS
	IOCB5	Change notification
	RB5	GPIO
pb6	TRD1	Trace (Debug)
	AN2	ADC
	CVD2	CVD
	CVDR2	CVD
	CVDT2	CVD
	RPB6	PPS
	IOCB6	Change notification
	RB6	GPIO
pb7	SWO	Debug
	AN3	ADC
	CVD3	CVD
	CVDR3	CVD
	CVDT3	CVD
	LVDIN	LVD Voltage reference
	RPB7	PPS
	IOCB7	Change notification
	RB7	GPIO
pb8	SWCLK	Debug
	RPB8	PPS
	IOCB8	Change notification
	RB8	GPIO
pb9	CM4_SWDIO	Debug
	SERCOM0_PAD2	SERCOM0
	RPB9	PPS
	INT0	Wake-up interrupt
	IOCB9	Change notification
	RB9	GPIO
pb10⁽¹⁾	RPB10	PPS
	IOCB10	Change notification
	RB10	GPIO
pb11⁽¹⁾	QSPI_DATA2	QSPI
	RPB11	PPS
	IOCB11	Change notification
	RB11	GPIO
pb12⁽¹⁾	QSPI_DATA1	QSPI
	RPB12	PPS
	IOCB12	Change notification
	RB12	GPIO
pb13⁽¹⁾	QSPI_CS	QSPI
	RTC_EVENT	RTCC
	RPB13	PPS
	IOCB13	Change notification
	RB13	GPIO
Note: Indicates that pins are not available on the 32-pin package.