5 Pinout and Signal Descriptions List

This following table provides detailed signal names classified by the peripherals along with the device pinout for each variant of the PIC32CX-BZ3 and the WBZ35x Module.

Table 5-1. Pinout and Signal Descriptions List
SoCModulePin Name(1)(2)(5)
PIC32CX5109BZ31032PIC32CX5109BZ31048WBZ351WBZ350
0(3)0(3)0(3), 1, 2, 8, 11, 19, 260(3), 1, 5, 8, 18, 21, 27GND
11

VPMU_VDD (PMU Core Circuit Power (1.9V-3.6V) Filtered version of main

supply input); connect 100 nF decoupling capacitor
222QSPI_DATA0/RTC_IN3/RPA0/IOCA0/RA0
318QSPI_SCK/RTC_IN2/RPA1/IOCA1/RA1
421QSPI_DATA3/RTC_IN1/RPA2/IOCA2/RA2
252419SERCOM0_PAD0/AC_CMP0/RPA5/IOCA5/RA5
3627, 2816, 17VDD (filtered version of main supply); connect 100 nF decoupling capacitor
472520TRD3/SERCOM0_PAD1/AC_CMP1_ALT/RPA6/IOCA6/RA6
583125TRCLK/SERCOM1_PAD0/RPA7/IOCA7/RA7
692924SERCOM1_PAD1/RPA8/IOCA8/RA8
7103022SERCOM1_PAD2/RTC_IN0_ALT/RPA9/IOCA9/RA9
8113223SERCOM1_PAD3/RTC_OUT_ALT/RPA10/IOCA10/RA10
1223QSPI_DATA1/RPB12/IOCB12/RB12
1317QSPI_CS/RTC_EVENT(5)/RPB13/IOCB13/RB13
9141514CM4_SWDIO/SERCOM0_PAD2/RPB9/INT0/IOCB9/RB9
10151413CM4_SWCLK/RPB8/IOCB8/RB8
1116163SERCOM0_PAD3/RTC_OUT(5)/RPA4/IOCA4/RA4
1733SERCOM2_PAD0(6)/AC_CMP1/RPA13/IOCA13/RA13
1834SERCOM2_PAD1(6)/RPA14/IOCA14/RA14
121932NMCLR; device reset
1320VDDCORE (Secondary digital power supply) (1.2V ± 5%); connect to CLDO_OUT with 1 uF to ground
21

CLDO_IN (Secondary digital power supply)

(1.2V ± 5%); connect to CLDO_OUT with 1 uF to ground

1422XO_N
1523XO_P
1624VDD_RF (RF block power supply, to be connected to RFLDO_OUT pin); with 1 uF to ground
1725CLDO_OUT (Core LDO power supply 1.2V ± 5%); connect 1 uF decoupling capacitor
1826RFLDO_OUT (RF LDO power supply (1.2V), to be connected to VDD_RF pin; connect 1 uF decoupling capacitor
1927BUCK_CLDO (RF/DIG CLDO supply); filtered version of PMU output; connect 1 uF decoupling capacitor
2028BUCK_PA (RF PA supply); filtered version of PMU output; connect 1 uF decoupling capacitor
2129RF_IO
30NC
314AN4/CVD4/CVDR4/CVDT4/AC_AIN2/RPB0/IOCB0/RB0
3238AN5/CVD5/CVDR5/CVDT5/AC_AIN3/RPB1/IOCB1/RB1
3337AN6/CVD6/CVDR6/CVDT6/AC_AIN0/RPB2/IOCB2/RB2
345AN7/CVD7/CVDR7/CVDT7/AC_AIN1/RPB3/IOCB3/RB3
22353911AN0/CVD0/CVDR0/CVDT0/RPB4/IOCB4/RB4(7)
233674AVDD (VDDA)
243769AN1/CVD1/CVDR1/CVDT1/RPB5/IOCB5/RB5(7)
25381212AN2/CVD2/CVDR2/CVDT2/RPB6/IOCB6/RB6(7)
26391315CM4_SWO/AN3/CVD3/CVDR3/CVDT3/LVDIN/RPB7/IOCB7/RB7(7)
27403610SCLKI/DACOUT/ANN0/RTC_IN0/RPA3/IOCA3/RA3
41VDD; filtered version of main supply; connect 100 nF decoupling capacitor
4235RPB10/IOCB10/RB10
4320QSPI_DATA2/RPB11/IOCB11/RB11
284496SOSCI/RA11(4)
2945107SOSCO/RA12(4)
3046PMU_MLDO_BUCK_VSENSE/PMU_MLDO_OUT (PMU Output – MLDO_O)
3147VPMU_VDD; filtered version of main supply input; connect 100 nF decoupling capacitor
3248PMU_BK_LX; connect 4.7 uH shielded inductor with 10 uF and 100 nF decoupling capacitor
Note:
  1. The remappable peripherals can use all GPIOs (RAn and RBn) via PPS.
  2. All GPIOs (RAn and RBn) can be used as I/O Change Notification (IOCAn and IOCBn).
  3. Connect the metal paddle at the bottom of the device to the system ground.
  4. If not using SOSC, use this pin as an input-only pin.
  5. The RTC_OUT and RTC_EVENT signals are multiplexed. Any one of the signals can be out at a time in pin-limited variants (32-pin variant).
  6. The SERCOM2 has only I2C functionality. The SERCOM2_PAD0 is I2C_SERCOM_SDA and the SERCOM2_PAD1 is I2C_SERCOM_SCL.
  7. JTAG is the default functionality on these pins. The recommendation is to write ‘0’ to the CFGCON0.JTAGEN register during application initialization to use these pins for regular GPIO functionality. See the CFGCON0 register from Related Links.
  8. A pull-up resistor (1K) on the SWCLK pin is critical for reliable operation.
  9. For more details on power supply pins connections and the filtering components, refer to the Design Package available at the product page.