8 Product Memory Mapping Overview

Figure 8-1. Product Mapping
Note:
  • Access attempts to any unimplemented memory location generate a bus error.
  • CFGCON1.QSCHE_EN controls the QSPI (XIP) space “cacheable and bufferable” attribute.
  • The MCROM is the microcode crypto ROM associated with the crypto engine. Only the crypto engine has read permissions to MCROM.
  • The DAP derives the base address of the components from CoreSight ROM (CROM) entry values.
  • Component base address = CROM base address + CROM entry value
  • For more details on each component register space, refer to the Cortex-M4 Technical Reference Manual r0p0 (CM4F) documentation.