18.5.2 WCMSIZ Register
Name: | WCMSIZ |
Offset: | 0x60 |
Reset: | 0x00000000 |
Property: | - |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
SRAM1_SIZE[1:0] | |||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | |||||||||
Reset |
Bits 9:8 – SRAM1_SIZE[1:0] Flex RAM Retention Size Configuration in the Deep Sleep Mode
Note: This field is only writable when CFGCON0.PMULOCK =
0
.Value | Description |
---|---|
11 | Not available |
10 | 32K Flex RAM is available in retention |
01 | 16K Flex RAM is available in retention |
00 | Flex RAM is completely powered OFF in the Deep Sleep mode |