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PIC32CX-BZ3 and WBZ35x Family Data Sheet
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PIC32CX-BZ3
WBZ350
WBZ351
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21
RAM Error Correction Code (RAMECC)
Introduction
PIC32CX-BZ3
SoC Family Features
WBZ35x
Module Features
Acronyms and Abbreviations
1
Ordering Information
2
Configuration Summary
3
PIC32CX-BZ3
SoC Description
4
WBZ35x
Module Description
5
Pinout and Signal Descriptions List
6
I/O Ports and Peripheral Pin Select (PPS)
7
Power Subsystem
8
Product Memory Mapping Overview
9
Processor and Architecture
10
Prefetch Cache (PCHE)
11
Cortex M Cache Controller (CMCC)
12
Secure Boot ROM
13
eFuse Controller
14
Security Features
15
Flash Controller (FC)
16
Device Service Unit (DSU)
17
Clock and Reset Unit (CRU)
18
Power Management Unit (PMU)
19
Watchdog Timer (WDT)
20
Deadman Timer (DMT)
21
RAM Error Correction Code (RAMECC)
21.1
Overview
21.2
Features
21.3
Block Diagram
21.4
Signal Description
21.5
Product Dependencies
21.6
Functional Description
21.7
Register Summary
21.8
Register Description
22
System Configuration and Register Locking (CFG)
23
Peripheral Module Disable (PMD)
24
Peripheral Access Controller (PAC)
25
Real-Time Counter and Calendar (RTCC)
26
Direct Memory Access Controller (DMAC)
27
External Interrupt Controller (EIC)
28
Configurable Custom Logic (CCL)
29
Frequency Meter (FREQM)
30
Event System (EVSYS)
31
Serial Communication Interface (SERCOM)
32
SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
33
SERCOM Serial Peripheral Interface (SERCOM SPI)
34
SERCOM Inter-Integrated Circuit (SERCOM I
2
C)
35
Quad Serial Peripheral Interface (QSPI)
36
Analog-to-Digital Converter (ADC)
37
Capacitive Voltage Divider (CVD) Controller for Touch Sensing
38
Analog Comparators (AC)
39
Digital-to-Analog Converter (DAC)
40
Timer/Counter (TC)
41
Timer/Counter for Control Applications (TCC)
42
802.15.4 Bluetooth® Radio Subsystem
43
Electrical Characteristics
44
Packaging Information
45
Appendix A: Regulatory Approval
46
Appendix B: Acronyms and Abbreviations
47
Document Revision History
Microchip Information
21 RAM Error Correction Code (RAMECC)
