47 Document Revision History
The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication.
Revision | Date | Section | Description |
---|---|---|---|
D | 06/2025 | Document | Updated Bluetooth version support from 5.2 to 6.0. |
Features, ADC Operation and Selecting the Analog-to-Digital Conversion Clock Source and Prescaler | Updated ADC conversion rate from 2 MSPS to 1 MSPS | ||
PIC32CX-BZ3 SoC Family Features |
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WBZ35x Module Features | Added certifications of NCC, KCC, MIC, and SRRC countries for the WBZ350 Module | ||
Configuration Summary | Updated Table 2-1 with TCx and TCCx information | ||
Pinout and Signal Descriptions List |
| ||
Peripheral Pin Select (PPS) | Deleted “In PPS mode, Maximum peripheral clock frequency = Direct mode clock frequency/2.” | ||
I/O Port Operation in Idle Mode | Updated the section | ||
Removed SIDL bit from the register | |||
Product Memory Mapping Overview | Updated Figure 8-1 | ||
Initialization | Updated enable-protection condition to CTRL.ENABLE=0 and LUTCTRLx.ENABLE=0 | ||
NVMCON2 | Removed Bit 0 – NVMPREPG NVM Pre-Program Control Bit | ||
Enabling and Disabling the DMT Module | Updated the section | ||
STATUS | Updated ECCDIS bit field description | ||
CFGCON1(L) | Added new bit DSRMPM | ||
INTENCLR | Updated bit field description of the ERR bit | ||
CTRLA | Updated bit field description of the SWRST bit | ||
Initialization | Updated the section | ||
INTFLAG | Updated bit field description of the DONE bit | ||
CTRL | Added CRCENABLE | ||
Clock Generation – Baud-Rate Generator | Updated Asynchronous Arithmetic equation’s Condition and Baud Rate (Bits Per Second) formula in the Table 31-3 | ||
CTRLA | Updated TXINV and RXINV bits | ||
CTRLC | |||
ADC Operation | Updated Figure 36-2 | ||
Block Diagram | Updated Figure 36-1 | ||
D | 06/2025 | Starting a Comparison, Selecting the Format of the ADC Result, Selecting the Scanned Inputs, Selecting the Analog-to-Digital Conversion Clock Source and Prescaler, Digital Comparator and Oversampling Digital Filter | Updated these sections |
Selecting the Voltage Reference Source | Updated section | ||
Selecting the Analog-to-Digital Conversion Clock Source and Prescaler | Updated Sample Time for the Shared ADC Module formula: tSAMC = (2.5 + ADCCON2<25:16>) * TAD7 | ||
ADC Sampling Requirements |
| ||
ADC Base Register (ADCBASE) Usage | Updated the section | ||
ADCCON1 | |||
CTRLBCLR | Updated the register | ||
CTRLBSET | Added Important note to the CMD bit. | ||
Initialization | Updated section | ||
Counter Operation | Added Note | ||
CTRLBCLR | CMD: Updated bit field description | ||
Added a Note | |||
Active Current Consumption DC Electrical Specifications | Updated values of the IDD_ACTIVE (TA 85°C and 125°C) in the Table 43-10 | ||
Idle Current Consumption DC Electrical Specifications | Updated values of the IDD_IDLE (TA 85°C and 125°C) in the Table 43-11 | ||
Sleep Current Consumption DC Electrical Specifications | Updated values of the IDD_SLEEP (TA 85°C and 125°C) in the Table 43-12 | ||
Deep Sleep Current Consumption DC Electrical Specifications | Updated values of the IDD_BACKUP (TA 85°C and 125°C) in the Table 43-13 | ||
XDS (Extreme Deep Sleep) Current Consumption DC Electrical Specifications | Updated values of the IDD_OFF (TA 85°C and 125°C) in the Table 43-14 | ||
Power Supply DC Module Electrical Specifications |
| ||
Wake-Up Timing from Low Power Modes AC Electrical Specifications | Updated Table 43-15 | ||
I/O Pin AC/DC Electrical Specifications | Updated VIH and VOL values in the Table 43-16 | ||
XOSC32 AC Electrical Specifications |
| ||
D | 06/2025 | ADC Electrical Specifications |
|
I2C Module Electrical Specifications | Updated Table 43-30 | ||
WBZ35x Module Packaging Dimension | Updated WBZ351 Module Packaging Dimension and WBZ350 Module Packaging Dimension chapters with latest package drawings | ||
Appendix A: Regulatory Approval | Updated China certification details for WBZ350PE/WBZ350UE and WBZ351PE/WBZ351UE modules | ||
C | 05/2024 | PIC32CX-BZ3 SoC Ordering Information | Added ordering information of PIC32CX5109BZ31032 |
WBZ35x Module Ordering Information | Added ordering information of WBZ350 Module | ||
PCB Antenna | Added antenna specification and radiation patterns for WBZ350 and WBZ351 modules | ||
Appendix A: Regulatory Approval | Added regulatory information for WBZ350 Module | ||
B | 02/2024 | PIC32CX-BZ3 SoC Family Features | Changed Coremark® value from 2.36 to 2.42 |
PIC32CX-BZ3 SoC Ordering Information | Ordering info for 32QFN SoC and Module is deleted | ||
WBZ35x Module Ordering Information |
| ||
Pinout and Signal Descriptions List |
| ||
Cortex M4F Processor | Removed “ARM® TrustZone® security” information in the Introduction section | ||
Peripheral Clock Generation (GCLK) | Added note “Only REFO1 - REFO4 can get routed to chip IOs” | ||
Power Management Unit (PMU) | Removed “Software Restore” topic | ||
CTRLC | Minor update | ||
ADCCON1 | Added note for “Fast Synchronous UPB Clock bit” | ||
CTRLBCLR | Minor update | ||
WEXCTRL | Removed “DTIEN3” bit | ||
WAVE | Removed “SWAP3” bit | ||
Power Supply DC Module Electrical Specifications | Minor update | ||
Wake-Up Timing from Low Power Modes AC Electrical Specifications | Added new topic | ||
I/O Pin AC/DC Electrical Specifications | Updated with new values | ||
DAC Module Electrical Specifications | Updated with new values | ||
SPI Module Electrical Specifications | Updated with new values | ||
UART AC Electrical Specifications | Updated with new values | ||
I2C Module Electrical Specifications | Updated with new values | ||
TCx Timer Capture Module AC Electrical Specifications | Added Timing Diagram | ||
TCCx Timer Capture Module AC Electrical Specifications | Added Timing Diagram | ||
Frequency Meter AC Electrical Specifications | Minor update | ||
SWD 2-Wire AC Electrical Specifications | Added Timing Diagram | ||
A | 11/2023 | Document | Initial revision |