9.2.2 Writing to a ROM Zone Register

A ROM Zone register can only be written to a logic ‘1’, which will set the corresponding memory zone to a ROM state. Once a ROM Zone register has been written, it can never be altered again.

To write to a ROM Zone register, the host must send a Start condition, followed by the device address byte with the opcode of 0111b (7h) specified, along with the appropriate client address combination and the Read/Write bit set to a logic ‘0’. The device will return an ACK. After the device address byte has been sent, the AT21CS01/AT21CS11 will return an ACK.

Following the device address byte is an 8-bit ROM Zone register address byte. The address sent to the device must match one of the ROM Zone register addresses specified in Table 9-2. After the ROM Zone register address has been sent, the AT21CS01/AT21CS11 will return an ACK.

After the AT21CS01/AT21CS11 has sent the ACK, the host must send an FFh data byte to set the appropriate ROM Zone register to the logic ‘1’ state. The device will then return an ACK and, after a Stop condition is executed, the device will enter a self-time internal write cycle, lasting t_WR. If a Stop condition is sent at any other point in the sequence, the write operation to the ROM Zone register is aborted. The device will not respond to any commands until the t_WR time has completed. This sequence is depicted in Figure 9-2.

Figure 9-2. Writing to a ROM Zone Register

Note: Any attempt to interrupt the internal write cycle by driving the SI/O line low may cause the register being programmed to become corrupted. Refer to Device Behavior During Internal Write Cycle for the behavior of the device while a write cycle is in progress. If the host must interrupt a write operation, the SI/O line must be driven low for t_DSCHG as noted in Interrupting the Device during an Active Operation.